Low Power Optimization Using Timing Budget Management
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چکیده
This paper develops the procedures of proving low power optimization using timing budgeting. The procedures include mapping of several designs, which are implemented using parameterized CoreGen IP cores, on Xilinx FPGA devices, modeling maximum timing budget problems with an LP solver, and utilizing Xpower to estimate power consumption. Our experimental results show that an average improvement of 20% in power consumption corresponding to decreased area overhead is possible.
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تاریخ انتشار 2004